october 2006 FDFC2P100 integrated p-channel powertrench ? mosfet and schottky diode ?2006 fairchild semiconductor corporation FDFC2P100 rev.c (w) www.fairchildsemi.com 1 FDFC2P100 integrated p-channel powertrench ? mosfet and schottky diode -20v, -3a, 150m ? features ? max r ds(on) = 150m ? at v gs = -4.5v, i d = -3.0a ? max r ds(on) = 200m ? at v gs = -2.5v, i d = -2.2a ? low gate charge (3.4nc typ) ? compact industry standard supersot tm -6 package schottky: ? v f < 0.45 v at i f = 1a ? rohs compliant general description the FDFC2P100 combine the exceptional performance of fairchild's powertrench mosfet technology with a very low forward voltage drop schottky barrier rectifier in an ssot-6 package. this device is designed specifically as a single package solution for dc to dc converters. it features a fast switching, low gate charge mosfet with very low on- state resistance. significant improvement of thermal characteristics and power dissipation via replacement of independently connected schottky with internal connection of schottky diode cathode pn to p-channel powertrench mosfet drain pin. mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage -20 v v gs gate to source voltage 12 v i d drain current -continuous (note 1a) -3 a -pulsed -6 p d power dissipation (note 1a) (note 1b) 1.5 0.8 w v rrm schotty repetitive peak reverse voltage 20 v i o schotty average forward current (note 1a) 1 a t j , t stg operating and storage junction temperature range -55 to +150 c r ja thermal resistance, junction to ambient (note 1a) 87 c/w r ja thermal resistance, junction to ambient (note 1b) 166 device marking device package reel size tape width quantity .100 FDFC2P100 ssot-6 7? 8mm 3000units 5 1 6 2 3 4 c/d c/d c/d a s g pin 1 supersot tm -6
FDFC2P100 integrated p-channel powertrench ? mosfet and schottky diode FDFC2P100 rev.c (w) www.fairchildsemi.com 2 electrical characteristics t j = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain to source breakdown voltage i d = -250 p a, v gs = 0v -20 v ' bv dss ' t j breakdown voltage temperature coefficient i d = -250 p a, referenced to 25 c -12 mv/ c i dss zero gate voltage drain current v gs = 0v, v ds = -16v -1 p a i gss gate to source leakage current v gs = 12v, v ds = 0v 100 p a on characteristics v gs(th) gate to source threshold voltage v gs = v ds , i d = -250 p a -0.6 -0.9 -1.5 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = -250 p a, referenced to 25 c 3 mv/ c r ds(on) drain to source on-resistance v gs = -4.5v, i d = -3.0a 95 150 m : v gs = -2.5v, i d = -2.2a 150 200 v gs = -4.5v, i d = -3.0a, t j = 125 c 130 252 g fs forward transconductance v ds = -5v, i d = -3.0a 5.4 s dynamic characteristics c iss input capacitance v ds = -10v, v gs = 0v, f = 1mhz 335 445 pf c oss output capacitance 80 105 pf c rss reverse transfer capacitance 40 60 pf r g gate resistance f = 1mhz 6 : switching characteristics t d(on) turn-on delay time v dd = -10v, i d = -3.0a v gs = -4.5v, r gen = 6 : 9 16 ns t r rise time 11 20 ns t d(off) turn-off delay time 12 22 ns t f fall time 4 8 ns q g(tot) total gate charge at -10v v gs = 0v to -10v v dd = -4.5v i d = -3.0a 3.4 4.7 nc q gs gate to source gate charge 0.9 nc q gd gate to drain ?miller? charge 1.0 nc drain-source diod e characteristics i s maximum continuous drain tio source diode forward current -1.2 a v sd source to drain diode forward voltage v gs = 0v, i s = -1.2a (note 2) -0.8 -1.2 v t rr reverse recovery time i f = -3.0a, di/dt = 100a/ p s 17 ns q rr reverse recovery charge 5 nc schottky diode characteristics i r reverse leakage v r = 20v t j = 25 c 26 400 p a t j = 100 c 2.7 20 ma v r = 10v t j = 25 c 23 200 p a t j = 100 c 2.5 10 ma v f forward voltage i f = 500ma t j = 25 c 0.31 0.4 v t j = 100 c 0.24 0.35 i f = 1a t j = 25 c 0.37 0.45 t j = 100 c 0.3 0.42
FDFC2P100 integrated p-channel powertrench ? mosfet and schottky diode FDFC2P100 rev.c (w) www.fairchildsemi.com 3 notes: 1: r ja is the sum of the junction-to-case and case-to-ambient thermal resi stance where the case thermal reference is defined as the s older mounting surface of the drain pins . r jc is guaranteed by design while r ca is determined by the user?s board design. 2: pulse test: pulse width <300 ms, duty cycle < 2.0% b) 166 c/w when mounted on a minimun pad a) 87 c/w when mounted on a 1in 2 pad of 2 oz copper
FDFC2P100 integrated p-channel powertrench ? mosfet and schottky diode FDFC2P100 rev.c (w) www.fairchildsemi.com 4 typical characteristics t j = 25c unless otherwise noted figure 1. 0.00.51.01.52.02.5 0 1 2 3 4 5 6 v gs = -3.5v pulse duration = 300 p s duty cycle = 2.0%max v gs = -2.0v v gs = -2.5v v gs = -3.0v v gs =-4.5v -i d , drain current (a) -v ds , drain to source voltage (v) on region characteristics figure 2. 0123456 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6 v gs = -4.5v v gs = -3.5v v gs = -2.5v pulse duration = 300 p s duty cycle = 2.0%max normalized drain to source on-resistance -i d , drain current(a) v gs = -3.0v v gs = -2.0v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n - r e s i s t a n c e -80 -40 0 40 80 120 160 0.6 0.8 1.0 1.2 1.4 1.6 i d = -3a v gs = -4.5v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 12345 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 pulse duration = 300 p s duty cycle = 2.0%max t j = 125 o c t j = 25 o c i d = -1.5a r ds(on) , drain to source on-resistance ( ohm ) -v gs , gate to source voltage (v) o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 0.51.01.52.02.53.0 0 1 2 3 4 5 6 v dd = - 5v pulse duration = 300 p s duty cycle = 2.0%max t j = - 55 o c t j = 25 o c t j = 125 o c - i d , drain current (a) -v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1e-4 1e-3 0.01 0.1 1 10 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0v -i s , reverse drain current (a) -v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDFC2P100 integrated p-channel powertrench ? mosfet and schottky diode FDFC2P100 rev.c (w) www.fairchildsemi.com 5 figure 7. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 1 2 3 4 5 v dd = -15v v dd = -10v i d = - 3a v dd = - 5v -v gs , gate to source voltage(v) q g , gate charge(nc) gate charge characteristics figure 8. 0 5 10 15 20 0 100 200 300 400 500 f = 1mhz v gs = 0v capacitance (pf) -v ds , drain to source voltage (v) c rss c oss c iss c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.00.10.20.30.4 1e-4 1e-3 0.01 0.1 1 t j = 100 o c t j = 125 o c t j = 25 o c i f , forward leakage current (a) v f , forward voltage (v) schottky diode forward voltage figure 10. 0 5 10 15 20 1e-5 1e-4 1e-3 0.01 0.1 t j = 100 o c t j = 25 o c i r , reverse leakage current(a) v r , reverse voltage(v) t j = 125 o c schottky diode reverse current figure 11. transient thermal response curve 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 2 10 3 1e-3 0.01 0.1 1 duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (s) d = 0.5 0.2 0.1 0.05 0.02 0.01 single pulse p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a typical characteristics t j = 25c unless otherwise noted
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